What is Co-Packaged Optics — and Why It Matters for the Next Generation of AI Networking?

What co-packaged optics is. Co-packaged optics (CPO) moves the optical conversion components — lasers, modulators, photodetectors — from an external pluggable faceplate module to inside the same package as the switching ASIC or GPU. Instead of routing an electrical signal from the chip through 30 centimetres of printed circuit board traces to a SerDes retimer and then to an external optical module, the electrical path is reduced to approximately 3 millimetres. The optics sit adjacent to the logic die that drives them.

The physics is unambiguous. Electrical signals degrade with distance; the higher the data rate, the faster they degrade. At 400G, external pluggable transceivers are acceptable. At 800G, power climbs to roughly 15 watts per port and signal integrity becomes costly to maintain. At 1.6T — the threshold that next-generation AI training clusters require for their all-reduce communication fabric — pluggable optics consume approximately 30 watts per module and require power-hungry digital signal processors to clean degraded signals. A 51.2 Tbps switch fully equipped with pluggable 1.6T modules requires cooling infrastructure that constrains the entire rack design.

What CPO achieves. By integrating optical engines directly alongside switch silicon, interconnect power consumption drops from roughly 15 picojoules per bit to 5 pJ/bit — a threefold improvement — with roadmaps targeting below 1 pJ/bit. Broadcom's 51.2 Tbps CPO platform demonstrates 70% lower energy dissipation than equivalent pluggable architectures. Intel's optical I/O chiplet delivers 4 Tbps bidirectional throughput at exactly 5 pJ/bit, a milestone that validates CPO's power economics at commercially relevant scale.

The bandwidth ceiling also rises. Front-panel pluggable modules are physically constrained by faceplate port count and copper trace density. CPO removes the faceplate constraint. Marvell's Photonic Fabric concept packs 102.4 Tbps of bandwidth into a 1U AI compute tray using 1,024 optical fibres routed directly from the package — more than twice the bandwidth density achievable with pluggable architecture at any price point. The switch no longer ends at the faceplate.

2026: from pilots to production. Broadcom and NVIDIA are the first two companies to deploy CPO in initial commercial production on scale-out network switches. Jensen Huang announced NVIDIA's first CPO-enabled switch at GTC 2025; Broadcom's "Bailly" 51.2 Tbps CPO platform has confirmed hyperscaler deployments. Marvell's Teralynx 10 switch ASIC supports 800G CPO electrical interfaces natively, with 1.6T interfaces targeted for 2027. Google and Microsoft are piloting 800G CPO-equipped top-of-rack and spine switches in their latest AI pod designs, per published hyperscaler infrastructure disclosures.

The OIF (Optical Internetworking Forum) and CPO Consortium published interoperability standards in 2024 that gave hyperscale procurement teams the multi-vendor baseline they needed to commit. Annual production of 1.6T modules is projected to exceed 5 million units in 2026 — a scale that signals genuine commercial commitment, not just technology validation.

The serviceability concern — and how it was answered. The primary objection to CPO deployment was operational: if the optical engine fails in a pluggable switch, you swap the module in minutes. If it fails in a CPO switch, you potentially replace the entire unit. That argument dominated networking discussions through 2024 and into 2025.

Meta presented reliability data at OFC 2026 that directly challenged it. In Meta's measured production deployments, CPO optical transceivers proved more reliable than traditional pluggable products — not marginally, but meaningfully. The integrated design eliminates the mechanical connector interface, the primary failure point in pluggable optics. This data point matters structurally: it converts CPO's assumed serviceability risk from liability into tested advantage, removing the last credible operational objection to hyperscale deployment.

The startup ecosystem and Asia's role. The CPO landscape extends well beyond the incumbents. Ayar Labs' TeraPHY chiplets integrate optical engines with customer ASICs and FPGAs at 1.6T bandwidth, with manufacturing partnerships at TSMC and Alchip (Taiwan). Marvell's acquisition of Celestial AI adds 3D photonic integration capability. Lightmatter's photonic fabric technology targets compute-to-compute connections, not just switch fabrics. AMD absorbed Enosemi for optical integration expertise.

The Asia supply chain runs deep. TSMC fabricates the silicon photonics chiplets that form the optical engine core. Taiwan's Alchip handles ASIC integration work for Ayar Labs. Furukawa Electric and Sumitomo Electric (Japan) supply the specialised multi-core fibres that CPO packages require at higher densities than standard data centre cabling. ASE Group's advanced packaging capability in Taiwan is relevant for the complex co-substrate assembly that CPO demands.

Scale-out today, scale-up next. CPO's first production wave targets scale-out networks — the switch fabric that connects GPU nodes to each other and to storage. That is already in production. The more technically demanding next phase is scale-up: integrating CPO directly into GPU or XPU packages to enable chip-to-chip optical interconnect within a single compute tray. Marvell's VP of Network Switching stated the case directly: "Integrating co-packaged optics into custom XPUs is the logical next step to scale performance with higher interconnect bandwidths and longer reach."

NVIDIA's NVLink Fusion strategy — allowing third-party ASICs to interconnect with NVIDIA's fabric — creates an implicit roadmap for scale-up CPO as a path beyond copper NVLink distances. When that happens, the boundary between "networking" and "compute packaging" dissolves. The switch becomes part of the processor package, and the processor package becomes the network.

Three predictions for 2026–27. First: by end-2027, 1.6T CPO-equipped switches become the standard specification for new hyperscaler AI pod builds — pluggable 1.6T remains for retrofit and legacy estates only. Broadcom, NVIDIA, and Marvell all have production-ready platforms; the question is now procurement velocity, not technology readiness.

Second: a Japanese or Korean optical component company — Furukawa Electric, Sumitomo Electric, or Samsung Electro-Mechanics — announces a major CPO supply agreement with a Tier 1 switch vendor by end-2026. The specialised multi-core fibre and connector market for CPO is underpopulated, and Asian materials companies are the natural incumbents.

Third: the "CPO vs LPO" debate that consumed networking conference agendas through 2025 resolves with distinct market segmentation rather than a winner. Linear-drive pluggable optics (LPO) — which cuts power by removing the DSP but keeps the pluggable form factor — serves enterprise Ethernet and moderate-density AI clusters. CPO wins for 200Tbps-class AI training fabrics where power density and signal integrity are non-negotiable. The market is large enough for both.

The optical interconnect market reaching $26 billion in 2026 makes photonics, for the first time, a semiconductor-scale business. The engineers and companies that understand light — that know how to build lasers, shape waveguides, and couple fibres at sub-micron precision — will be as commercially consequential as those who understand transistors.